On the Impact of Aging on Power Analysis Attacks Targeting Power-Equalized Cryptographic Circuits

2021 - Md Toufiq Hasan Anik, Bijan Fadaeinia, Amir Moradi, Naghmeh Karimi

26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021, January 18-21, 2021 [doi]

Low-Latency Hardware Masking with Application to AES

2020 - Pascal Sasdrich, Begül Bilgin, Michael Hutter, Mark E. Marson

IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Volume 2020, Issue 2 [pdf]

Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs

2014 - Pawel Swierczynski, Amir Moradi, David Oswald, Chris­tof Paar

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 7 Issue 4, December 2014. [DOI] [pdf]

Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

2006 - Stefan Mangard, Kai Schramm

Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, Oktober 10 - 13, 2006. [pdf]

A Stochastic Model for Differential Side Channel Cryptanalysis

2005 - Werner Schindler, Kerstin Lemke-Rust, Chris­tof Paar

Cryptographic Hardware and Embedded Systems - - CHES 2005, 7th International Workshop, Edinburgh, UK. August 29 - September 1, 2005. [pdf]

DPA on n-bit sized Boolean and Arithmetic Operations and its Application to IDEA, RC6 and the HMAC-Construction

2004 - Kerstin Lemke, Kai Schramm, Chris­tof Paar

Cryptographic Hardware and Embedded Systems - CHES 2004, 6th International Workshop, Cambridge, MA, USA, August 2004 [pdf]