Veröffentlichungen

Fast Arithmetic for Public-Key Algorithms in Galois Fields with Composite Exponents

1999 - Chris­tof Paar, P. Fleischmann, P. Soria-Rodriguez

IEEE Transactions on Computers, vol. 48, no. 10, pp. 1025-1034, October, 1999. [gz] [pdf]

An Algorithm-Agile Cryptographic Co-processor Based on FPGAs

1999 - Chris­tof Paar, B. Chetwynd, T. Connor, S. Y. Deng, S. Marchant

The SPIE's Symposium on Voice, Video, and Data Communications, Boston, MA, September 19-22, 1999 [pdf] [gzipped postscript]

Towards an FPGA Architecture Optimized for Public-Key Algorithms

1999 - A. Elbirt, Chris­tof Paar

The SPIE's Symposium on Voice, Video, and Data Communications, Boston, MA. September 19-22, 1999. [pdf]

Low-power design of a digital FM demodulator based on zero-cross detection at IF

1999 - Tolga Yalcin, Neslin Ismailoglu (TUBITAK)

Vehicular Technology Conference, 1999. VTC 1999 - Fall. IEEE VTS 50th [DOI] [pdf]

Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES ’99)

1999 - C. Koc, Chris­tof Paar

"", Lecture Notes in Computer Science 1717, Springer Verlag, Worcester Polytechnic Institute, Worcester, USA, August 12-13, 1999. [web]

Design of a fully-static differential low-power CMOS flip-flop

1999 - Tolga Yalcin, Neslin Ismailoglu (TUBITAK)

[DOI] [pdf]

Cryptography in Modern Communication Systems (Extended Abstract)

1999 - Daniel V. Bailey, William Cammack, Jorge Guajardo Merchan, Chris­tof Paar

Invited presentation at TI DSPS FEST '99, Houston, Texas, USA, 1999 [pdf] [gzipped postscript]

A Super-Serial Galois Field Multiplier for FPGAs and its Application to Public-Key Algorithms

1999 - G. Orlando, Chris­tof Paar

Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 99), Napa Valley, CA, April 21-23, 1999. [ps]

Montgomery Modular Multiplication on Reconfigurable Hardware"

1999 - T. Blum, Chris­tof Paar

14th IEEE Symposium on Computer Arithmetic (ARITH-14), Adelaide, Australia, April 14-16, 1999. [ps]

Low-power design of a 64-tap, 4-bit digital matched filter using systolic array architecture and CVSL circuit techniques in CMOS

1998 - Tolga Yalcin, Neslin Ismailoglu (TUBITAK)

Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on [DOI] [pdf]