Publications

New Techniques for Structural Batch Verification in Bilinear Groups with Applications to Groth–Sahai Proofs

2017 - Gottfried Herold, Max Hoffmann, Michael Klooß, Carla Ràfols, Andy Rupp

ACM CCS 2017 on Oct. 30–Nov. 3, 2017, Dallas, TX, USA [pdf]

Differential Cryptanalysis of 18-Round PRIDE

2017 - Virginie Lallemand, Shahram Rasoolzadeh

International Conference on Cryptology in India (Indocrypt 2017), Chennai, December 10-13, 2017. [pdf] [DOI]

Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives

2017 - Jérémy Jean, Amir Moradi, Thomas Peyrin, Pascal Sasdrich

Work­shop on Cryp­to­gra­phic Hard­ware and Em­bed­ded Sys­tems, CHES 2017, Taipei, Taiwan, September 25 – 28, 2017. [pdf] [DOI] [slides]

Implementing the NewHope-Simple Key Exchange on Low-Cost FPGAs

2017 - Tobias Oder, Tim Güneysu

La­tin­crypt 2017, La Habana, Cuba, September 20-22, 2017 [VHDL] [pdf]

Reverse Engineering x86 Processor Microcode

2017 - Philipp Koppe, Benjamin Kollenda, Marc Fyrbiak, Christian Kison, Robert Gawlik, Chris­tof Paar, Thorsten Holz

USENIX Security Symposium, Vancouver, Canada, August 2017 [GitHub] [PDF]

A look at the dark side of hardware reverse engineering - a case study

2017 - Sebastian Wallat, Marc Fyrbiak, Moritz Schlögel, Chris­tof Paar

IEEE 2nd International Verification and Security Workshop, IVSW 2017, Thessaloniki, Greece, July 3-5, 2017. [DOI] [pdf]

Hardware reverse engineering: Overview and open challenges

2017 - Marc Fyrbiak, Sebastian Strauß, Christian Kison, Sebastian Wallat, Malte Elson, Nikol Rummel, Chris­tof Paar

IEEE 2nd International Verification and Security Workshop, IVSW 2017, Thessaloniki, Greece, July 3-5, 2017. [DOI] [PDF]

Cryptography for Next Generation TLS: Implementing the RFC 7748 Elliptic Curve448 Cryptosystem in Hardware

2017 - Pascal Sasdrich, Tim Güneysu

54. Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22 2017. [DOI] [pdf]

On the Easiness of Turning Higher-Order Leakages into First-Order

2017 - Thorben Moos, Amir Moradi

8th In­ter­na­tio­nal Work­shop on Con­struc­tive Si­de-Chan­nel Ana­ly­sis and Se­cu­re De­sign, COSA­DE 2017, Paris, France, April 13-14, 2017. [pdf] [DOI]

SafeDRP: Yet Another Way Toward Power-Equalized Designs in FPGA

2017 - Maik Ender, Alexander Wild, Amir Moradi

In­ter­na­tio­nal Work­shop on Con­struc­tive Si­de-Chan­nel Ana­ly­sis and Se­cu­re De­sign, COSA­DE 2017, Paris, France, April 13-14, 2017. [pdf] [DOI]
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