SafeDRP: Yet Another Way Toward Power-Equalized Designs in FPGA

2017 - Maik Ender, Alexander Wild, Amir Moradi

In­ter­na­tio­nal Work­shop on Con­struc­tive Si­de-Chan­nel Ana­ly­sis and Se­cu­re De­sign, COSA­DE 2017, Paris, France, April 13-14, 2017. [pdf] [DOI]

Static Power Side-Channel Analysis of a Threshold Implementation Prototype Chip

2017 - Thorben Moos, Amir Moradi, Bastian Richter

De­sign, Au­to­ma­ti­on & Test in Eu­ro­pe Con­fe­rence & Ex­hi­bi­ti­on, DATE 2017, Lausanne, Switzerland, March 27 - 31 , 2017 (best paper can­di­da­te). [pdf] [DOI] [Amplifier Design]

Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware

2017 - Pascal Sasdrich, Amir Moradi, Tim Güneysu

RSA Conference Cryptographers’ Track, CT-RSA 2017, San Francisco, February 14-17 2017. [pdf] [DOI]